Introducing a groundbreaking high-density 3D Via Resistive Random Access Memory (RRAM) architecture seamlessly compatible with Fin Field-Effect Transistors (FinFETs) in logic processes. Through the careful design of a structure where vias and metal wires remain intentionally isolated in the layout, a Via RRAM is ingeniously crafted. This approach offers exceptional stackability, permitting each metal wire layer within the memory unit to incorporate a pair of RRAM elements, culminating in the creation of a remarkably high-density stackable embedded memory solution.