A novel LTPO-based display array technology with CBRAM-embedded in a pixel has been successfully developed for the high-resolution and power-saving near-eye VR/AR displays. And a high-voltage gain CMOS inverter comprised by LTPO architecture is demonstrated acting as a digital driving circuit for the realistic FPD applications.
In our work, a breakthrough in the bottleneck of N-channel AOS TFT performance has been made, such as high mobility of (>25cm2/V‧s), well on/off current ratio of (~10^9), and nearly ideal sub-threshold swing (S.S.~65mV/dec.). So that the novel LTPO transistors architecture with nonvolatile CBRAM-embedded in pixel can be pioneerly developed acting as the display switch/driving array, applicable for the next-generation high-resolution near-eye VR/AR displays. The technology features low operation voltage, less device footprint in a pixel, low signal propagation delay and low power consumption, which are demonstrated by a high-voltage gain LTPO-based inverter. With the additional integration of CBRAM in pixel to store image signal, the frame rate can be effectively lowered, resultantly decreasing power consumption. In conclusion, this technology is highly promising to meet the FPD industry’s needs for the next-generation high-resolution and power-saving VR/AR display electronics applications.

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