Energy-Efficient Optimization Problem Decision: Neural Network-based In-Memory Annealing Units for Route Scheduling and Genome Assembly
The technology combines memory devices, in-memory computing, and simulated annealing algorithms to create the world＇s first in-memory annealing unit (IMAU). First verified on 10-city traveling salesman problem and 300-read genome assembly, it is expected to be 1000 times faster than current hardware. It serves as a potential tool for high-speed optimal decision-making in chip design, biomedicine, and logistics, presented at IEDM 2021 and awarded first place in the 2024 Micron MIMORY Award.
Enhancing Anodization of Semiconductor Materials Technology with Waf er Bonding Transforming Interface Function
Deep learning-based EDA tools for lithography simulation, photomask correction, and novel layout patterns detection
Transparent flexible display fabricated by self-emitting quantum dot device and bank-free panel technology
Low Temperature Polycrystalline Silicon Oxide (LTPO) TFT Architecture with Memory-embedded in Pixel for High-resolution and Power-saving Near-eye VR/AR Displays Applications
Technology maturity：Prototype
Exhibiting purpose：Display of scientific results
Trading preferences：Negotiate by self
Coming soon!