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Development for Advanced High-Density Monolithic Three Dimensional Integrated Circuits with Multi-stacked Transistor Layers

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Development for Advanced High-Density Monolithic Three Dimensional Integrated Circuits with Multi-stacked Transistor Layers

The aim of this project is to develop Advanced High-Density Monolithic Three Dimensional Integrated Circuits with Multi-stacked Transistor Layers by integrating three layers of high-performance stacked transistors and extending them to the circuit design of application-specific integrated circuits (ASICs). The research contents include the developments of novel semiconductor materials, high-performance GAAFET devices, the device model establishment, and circuit designs for ASICs. Based on the device models of three-layer stacked transistors, the driver IC design of augmented reality telescopes with image sensors and micro-LED display circuits is realized to demonstrate the technology feasibility of the proposed M3D-ICs.

Contact

  • Name:Tsung-Che Chiang

  • Phone:03-5712121 分機59313

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  • Pavilion:Future Tech Semiconductor block

  • Affiliated Ministry:National Science and Technology Council

  • Application Field:Electronics & Optoelectronics

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  • Technology maturity:Experiment stage

  • Exhibiting purpose:Display of scientific results

  • Trading preferences:Exclusive license/assignment、Technical license/cooperation、Negotiate by self

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